Fail* directories reorganized, Code-cleanup (-> coding-style), Typos+comments fixed.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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adrian
182
simulators/ovp/armmModel/armmSemiHost.c
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182
simulators/ovp/armmModel/armmSemiHost.c
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/*
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* Copyright (c) 2005-2011 Imperas Software Ltd., www.imperas.com
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*
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* YOUR ACCESS TO THE INFORMATION IN THIS MODEL IS CONDITIONAL
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* UPON YOUR ACCEPTANCE THAT YOU WILL NOT USE OR PERMIT OTHERS
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* TO USE THE INFORMATION FOR THE PURPOSES OF DETERMINING WHETHER
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* IMPLEMENTATIONS OF THE ARM ARCHITECTURE INFRINGE ANY THIRD
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* PARTY PATENTS.
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*
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* THE LICENSE BELOW EXTENDS ONLY TO USE OF THE SOFTWARE FOR
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* MODELING PURPOSES AND SHALL NOT BE CONSTRUED AS GRANTING
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* A LICENSE TO CREATE A HARDWARE IMPLEMENTATION OF THE
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* FUNCTIONALITY OF THE SOFTWARE LICENSED HEREUNDER.
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* YOU MAY USE THE SOFTWARE SUBJECT TO THE LICENSE TERMS BELOW
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* PROVIDED THAT YOU ENSURE THAT THIS NOTICE IS REPLICATED UNMODIFIED
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* AND IN ITS ENTIRETY IN ALL DISTRIBUTIONS OF THE SOFTWARE,
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* MODIFIED OR UNMODIFIED, IN SOURCE CODE OR IN BINARY FORM.
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*
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* Licensed under an Imperas Modfied Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.ovpworld.org/licenses/OVP_MODIFIED_1.0_APACHE_OPEN_SOURCE_LICENSE_2.0.pdf
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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* either express or implied.
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*
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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// VMI header files
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#include "vmi/vmiTypes.h"
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#include "vmi/vmiMessage.h"
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#include "vmi/vmiMt.h"
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// model header files
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#include "armFunctions.h"
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#include "armRegisters.h"
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#include "armStructure.h"
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//
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// Prefix for messages from this module
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//
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#define CPU_PREFIX "ARM_SEMIHOST"
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//
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// Return processor endianness
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//
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inline static memEndian getEndian(armP arm) {
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return armGetEndian((vmiProcessorP)arm, False);
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}
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//
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// Morph return from an opaque intercepted function
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//
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VMI_INT_RETURN_FN(armIntReturnCB) {
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vmimtUncondJumpReg(0, ARM_REG(ARM_REG_LR), VMI_NOREG, vmi_JH_RETURN);
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}
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//
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// This callback should create code to assign function result to the standard
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// return result register
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//
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VMI_INT_RESULT_FN(armIntResultCB) {
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vmimtMoveRR(32, ARM_REG(0), VMI_FUNCRESULT);
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}
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//
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// This callback should create code to push 32-bit function parameter 'paramNum'
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//
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static Uns32 push4ByteArg(vmiProcessorP processor, Uns32 paramNum) {
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if(paramNum<=3) {
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// argument in a register
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vmimtArgReg(32, ARM_REG(paramNum));
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} else {
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// argument on the stack
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armP arm = (armP)processor;
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// fetch into a temporary
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vmimtLoadRRO(
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32, // destBits
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32, // memBits
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(paramNum-4)*4, // offset
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ARM_TEMP(0), // destination (rd)
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ARM_REG(ARM_REG_SP), // stack address (ra)
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getEndian(arm), // endian
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False, // signExtend
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False // checkAlign
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);
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// push temporary argument
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vmimtArgReg(32, ARM_TEMP(0));
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}
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return paramNum+1;
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}
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//
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// This callback should create code to push 64-bit function parameter 'paramNum'
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//
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static Uns32 push8ByteArg(vmiProcessorP processor, Uns32 paramNum) {
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paramNum += push4ByteArg(processor, paramNum);
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paramNum += push4ByteArg(processor, paramNum);
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return paramNum;
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}
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//
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// This callback should create code to push address function parameter 'paramNum'
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//
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static Uns32 pushAddressArg(vmiProcessorP processor, Uns32 paramNum) {
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if(paramNum<=3) {
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// argument in a register
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vmimtArgRegSimAddress(32, ARM_REG(paramNum));
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} else {
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// argument on the stack
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armP arm = (armP)processor;
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// fetch into a temporary
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vmimtLoadRRO(
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32, // destBits
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32, // memBits
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(paramNum-4)*4, // offset
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ARM_TEMP(0), // destination (rd)
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ARM_REG(ARM_REG_SP), // stack address (ra)
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getEndian(arm), // endian
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False, // signExtend
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False // checkAlign
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);
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// push temporary argument
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vmimtArgRegSimAddress(32, ARM_TEMP(0));
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}
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return paramNum+1;
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}
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//
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// This callback should create code to push function arguments prior to an
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// Imperas standard intercept
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//
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VMI_INT_PAR_FN(armIntParCB) {
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Uns32 paramNum = 0;
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char ch;
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while((ch=*format++)) {
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switch(ch) {
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case '4':
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paramNum = push4ByteArg(processor, paramNum);
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break;
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case '8':
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paramNum = push8ByteArg(processor, paramNum);
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break;
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case 'a':
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paramNum = pushAddressArg(processor, paramNum);
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break;
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default:
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VMI_ABORT("Unrecognised format character '%c'", ch);
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}
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}
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}
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