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Fail* directories reorganized, Code-cleanup (-> coding-style), Typos+comments fixed.

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git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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adrian
2012-06-08 20:09:43 +00:00
parent d474a5b952
commit 2575604b41
866 changed files with 1848 additions and 1879 deletions
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88
simulators/ovp/armmModel/armmParameters.h Normal file
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/*
* Copyright (c) 2005-2011 Imperas Software Ltd., www.imperas.com
*
* YOUR ACCESS TO THE INFORMATION IN THIS MODEL IS CONDITIONAL
* UPON YOUR ACCEPTANCE THAT YOU WILL NOT USE OR PERMIT OTHERS
* TO USE THE INFORMATION FOR THE PURPOSES OF DETERMINING WHETHER
* IMPLEMENTATIONS OF THE ARM ARCHITECTURE INFRINGE ANY THIRD
* PARTY PATENTS.
*
* THE LICENSE BELOW EXTENDS ONLY TO USE OF THE SOFTWARE FOR
* MODELING PURPOSES AND SHALL NOT BE CONSTRUED AS GRANTING
* A LICENSE TO CREATE A HARDWARE IMPLEMENTATION OF THE
* FUNCTIONALITY OF THE SOFTWARE LICENSED HEREUNDER.
* YOU MAY USE THE SOFTWARE SUBJECT TO THE LICENSE TERMS BELOW
* PROVIDED THAT YOU ENSURE THAT THIS NOTICE IS REPLICATED UNMODIFIED
* AND IN ITS ENTIRETY IN ALL DISTRIBUTIONS OF THE SOFTWARE,
* MODIFIED OR UNMODIFIED, IN SOURCE CODE OR IN BINARY FORM.
*
* Licensed under an Imperas Modfied Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.ovpworld.org/licenses/OVP_MODIFIED_1.0_APACHE_OPEN_SOURCE_LICENSE_2.0.pdf
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied.
*
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef ARMM_PARAMETERS_H
#define ARMM_PARAMETERS_H
// VMI header files
#include "vmi/vmiAttrs.h"
#include "vmi/vmiParameters.h"
#include "armTypeRefs.h"
//
// Define the attributes value structure
//
typedef struct armParamValuesS {
VMI_ENUM_PARAM(variant);
VMI_ENDIAN_PARAM(endian);
VMI_ENUM_PARAM(compatibility);
VMI_BOOL_PARAM(verbose);
VMI_BOOL_PARAM(showHiddenRegs);
VMI_BOOL_PARAM(UAL);
VMI_BOOL_PARAM(enableVFPAtReset);
VMI_BOOL_PARAM(disableBitBand);
VMI_BOOL_PARAM(resetAtTime0);
VMI_UNS32_PARAM(override_CPUID);
VMI_UNS32_PARAM(override_MPU_TYPE);
VMI_ENUM_PARAM(instructionEndian);
VMI_UNS32_PARAM(override_debugMask);
VMI_UNS32_PARAM(override_MPUType);
VMI_UNS32_PARAM(override_InstructionAttributes0);
VMI_UNS32_PARAM(override_InstructionAttributes1);
VMI_UNS32_PARAM(override_InstructionAttributes2);
VMI_UNS32_PARAM(override_InstructionAttributes3);
VMI_UNS32_PARAM(override_InstructionAttributes4);
VMI_UNS32_PARAM(override_InstructionAttributes5);
VMI_UNS32_PARAM(override_MVFR0);
VMI_UNS32_PARAM(override_MVFR1);
VMI_UNS32_PARAM(override_rotateUnaligned);
VMI_UNS32_PARAM(override_align64as32);
VMI_UNS32_PARAM(override_STRoffsetPC12);
VMI_UNS32_PARAM(override_ERG);
VMI_UNS32_PARAM(override_priorityBits);
VMI_UNS32_PARAM(override_numInterrupts);
VMI_UNS32_PARAM(fail_salp);
} armParamValues, *armParamValuesP;
#endif