Fail* directories reorganized, Code-cleanup (-> coding-style), Typos+comments fixed.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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116
simulators/ovp/armmModel/armVM.h
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116
simulators/ovp/armmModel/armVM.h
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/*
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* Copyright (c) 2005-2011 Imperas Software Ltd., www.imperas.com
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*
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* YOUR ACCESS TO THE INFORMATION IN THIS MODEL IS CONDITIONAL
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* UPON YOUR ACCEPTANCE THAT YOU WILL NOT USE OR PERMIT OTHERS
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* TO USE THE INFORMATION FOR THE PURPOSES OF DETERMINING WHETHER
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* IMPLEMENTATIONS OF THE ARM ARCHITECTURE INFRINGE ANY THIRD
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* PARTY PATENTS.
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*
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* THE LICENSE BELOW EXTENDS ONLY TO USE OF THE SOFTWARE FOR
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* MODELING PURPOSES AND SHALL NOT BE CONSTRUED AS GRANTING
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* A LICENSE TO CREATE A HARDWARE IMPLEMENTATION OF THE
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* FUNCTIONALITY OF THE SOFTWARE LICENSED HEREUNDER.
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* YOU MAY USE THE SOFTWARE SUBJECT TO THE LICENSE TERMS BELOW
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* PROVIDED THAT YOU ENSURE THAT THIS NOTICE IS REPLICATED UNMODIFIED
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* AND IN ITS ENTIRETY IN ALL DISTRIBUTIONS OF THE SOFTWARE,
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* MODIFIED OR UNMODIFIED, IN SOURCE CODE OR IN BINARY FORM.
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*
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* Licensed under an Imperas Modfied Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.ovpworld.org/licenses/OVP_MODIFIED_1.0_APACHE_OPEN_SOURCE_LICENSE_2.0.pdf
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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* either express or implied.
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*
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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#ifndef ARM_VM_H
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#define ARM_VM_H
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// VMI header files
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#include "vmi/vmiTypes.h"
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// model header files
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#include "armTypeRefs.h"
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//
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// This is the minimum page size (1Kb)
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//
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#define MIN_PAGE_SIZE 1024
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//
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// Enumation describing actions performed by armVMMiss
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//
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typedef enum armVMActionE {
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MA_OK, // memory was mapped, access can proceed
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MA_EXCEPTION // memory was not mapped, exception was triggered
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} armVMAction;
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//
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// Try mapping memory at the passed address for the specified access type and
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// return a status code indicating whether the mapping succeeded
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//
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armVMAction armVMMiss(
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armP arm,
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memPriv requiredPriv,
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Uns32 address,
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Uns32 bytes,
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memAccessAttrs attrs
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);
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//
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// Set the privileged mode data domain to the user domain (for LDRT, STRT)
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//
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void armVMSetUserPrivilegedModeDataDomain(armP arm);
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//
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// Restore the normal data domain for the current mode (for LDRT, STRT)
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//
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void armVMRestoreNormalDataDomain(armP arm);
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//
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// Write the indexed MPU RBAR register value
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//
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void armVMWriteRBAR(armP arm, Uns32 index, Bool isData, Uns32 newValue);
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//
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// Read the indexed MPU RBAR register value
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//
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Uns32 armVMReadRBAR(armP arm, Uns32 index, Bool isData);
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//
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// Write the indexed MPU RASR register value
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//
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void armVMWriteRASR(armP arm, Uns32 index, Bool isData, Uns32 newValue);
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//
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// Read the indexed MPU RASR register value
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//
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Uns32 armVMReadRASR(armP arm, Uns32 index, Bool isData);
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//
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// Flush the privileged mode MPU
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//
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void armVMFlushMPUPriv(armP arm);
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//
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// Reset VM structures
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//
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void armVMReset(armP arm);
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//
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// Free structures used for virtual memory management
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//
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void armVMFree(armP arm);
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#endif
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