Fail* directories reorganized, Code-cleanup (-> coding-style), Typos+comments fixed.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
adrian
350
simulators/bochs/cpu/data_xfer64.cc
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350
simulators/bochs/cpu/data_xfer64.cc
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/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2009 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_X86_64
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_RRXRAX(bxInstruction_c *i)
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{
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Bit64u temp64 = RAX;
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RAX = BX_READ_64BIT_REG(i->rm());
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BX_WRITE_64BIT_REG(i->rm(), temp64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RRXIq(bxInstruction_c *i)
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{
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BX_WRITE_64BIT_REG(i->rm(), i->Iq());
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV64_GdEdM(bxInstruction_c *i)
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{
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Bit64u eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u val32 = read_virtual_dword_64(i->seg(), eaddr);
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BX_WRITE_32BIT_REGZ(i->nnn(), val32);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV64_EdGdM(bxInstruction_c *i)
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{
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Bit64u eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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write_virtual_dword_64(i->seg(), eaddr, BX_READ_32BIT_REG(i->nnn()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EqGqM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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write_virtual_qword_64(i->seg(), eaddr, BX_READ_64BIT_REG(i->nnn()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GqEqM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u val64 = read_virtual_qword_64(i->seg(), eaddr);
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BX_WRITE_64BIT_REG(i->nnn(), val64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GqEqR(bxInstruction_c *i)
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{
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LEA_GqM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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BX_WRITE_64BIT_REG(i->nnn(), eaddr);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_ALOq(bxInstruction_c *i)
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{
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AL = read_virtual_byte_64(i->seg(), i->Iq());
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqAL(bxInstruction_c *i)
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{
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write_virtual_byte_64(i->seg(), i->Iq(), AL);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_AXOq(bxInstruction_c *i)
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{
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AX = read_virtual_word_64(i->seg(), i->Iq());
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqAX(bxInstruction_c *i)
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{
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write_virtual_word_64(i->seg(), i->Iq(), AX);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EAXOq(bxInstruction_c *i)
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{
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RAX = read_virtual_dword_64(i->seg(), i->Iq());
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqEAX(bxInstruction_c *i)
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{
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write_virtual_dword_64(i->seg(), i->Iq(), EAX);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RAXOq(bxInstruction_c *i)
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{
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RAX = read_virtual_qword_64(i->seg(), i->Iq());
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqRAX(bxInstruction_c *i)
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{
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write_virtual_qword_64(i->seg(), i->Iq(), RAX);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EqIdM(bxInstruction_c *i)
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{
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Bit64u op_64 = (Bit32s) i->Id();
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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write_virtual_qword_64(i->seg(), eaddr, op_64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EqIdR(bxInstruction_c *i)
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{
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Bit64u op_64 = (Bit32s) i->Id();
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BX_WRITE_64BIT_REG(i->rm(), op_64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GqEbM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit8u op2_8 = read_virtual_byte_64(i->seg(), eaddr);
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/* zero extend byte op2 into qword op1 */
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BX_WRITE_64BIT_REG(i->nnn(), (Bit64u) op2_8);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GqEbR(bxInstruction_c *i)
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{
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Bit8u op2_8 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
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/* zero extend byte op2 into qword op1 */
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BX_WRITE_64BIT_REG(i->nnn(), (Bit64u) op2_8);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GqEwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u op2_16 = read_virtual_word_64(i->seg(), eaddr);
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/* zero extend word op2 into qword op1 */
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BX_WRITE_64BIT_REG(i->nnn(), (Bit64u) op2_16);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GqEwR(bxInstruction_c *i)
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{
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Bit16u op2_16 = BX_READ_16BIT_REG(i->rm());
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/* zero extend word op2 into qword op1 */
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BX_WRITE_64BIT_REG(i->nnn(), (Bit64u) op2_16);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEbM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit8u op2_8 = read_virtual_byte_64(i->seg(), eaddr);
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/* sign extend byte op2 into qword op1 */
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BX_WRITE_64BIT_REG(i->nnn(), (Bit8s) op2_8);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEbR(bxInstruction_c *i)
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{
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Bit8u op2_8 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
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/* sign extend byte op2 into qword op1 */
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BX_WRITE_64BIT_REG(i->nnn(), (Bit8s) op2_8);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEwM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u op2_16 = read_virtual_word_64(i->seg(), eaddr);
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/* sign extend word op2 into qword op1 */
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BX_WRITE_64BIT_REG(i->nnn(), (Bit16s) op2_16);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEwR(bxInstruction_c *i)
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{
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Bit16u op2_16 = BX_READ_16BIT_REG(i->rm());
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/* sign extend word op2 into qword op1 */
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BX_WRITE_64BIT_REG(i->nnn(), (Bit16s) op2_16);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEdM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op2_32 = read_virtual_dword_64(i->seg(), eaddr);
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/* sign extend word op2 into qword op1 */
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BX_WRITE_64BIT_REG(i->nnn(), (Bit32s) op2_32);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEdR(bxInstruction_c *i)
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{
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Bit32u op2_32 = BX_READ_32BIT_REG(i->rm());
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/* sign extend word op2 into qword op1 */
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BX_WRITE_64BIT_REG(i->nnn(), (Bit32s) op2_32);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EqGqM(bxInstruction_c *i)
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{
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Bit64u op2_64, op1_64;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
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op2_64 = BX_READ_64BIT_REG(i->nnn());
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write_RMW_virtual_qword(op2_64);
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BX_WRITE_64BIT_REG(i->nnn(), op1_64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EqGqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
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Bit64u op2_64 = BX_READ_64BIT_REG(i->nnn());
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BX_WRITE_64BIT_REG(i->nnn(), op1_64);
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BX_WRITE_64BIT_REG(i->rm(), op2_64);
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}
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// Note: CMOV accesses a memory source operand (read), regardless
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// of whether condition is true or not. Thus, exceptions may
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// occur even if the MOV does not take place.
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVO_GqEqR(bxInstruction_c *i)
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{
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if (get_OF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNO_GqEqR(bxInstruction_c *i)
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{
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if (!get_OF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVB_GqEqR(bxInstruction_c *i)
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{
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if (get_CF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNB_GqEqR(bxInstruction_c *i)
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{
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if (!get_CF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVZ_GqEqR(bxInstruction_c *i)
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{
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if (get_ZF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNZ_GqEqR(bxInstruction_c *i)
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{
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if (!get_ZF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVBE_GqEqR(bxInstruction_c *i)
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{
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if (get_CF() || get_ZF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNBE_GqEqR(bxInstruction_c *i)
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{
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if (! (get_CF() || get_ZF()))
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVS_GqEqR(bxInstruction_c *i)
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{
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if (get_SF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNS_GqEqR(bxInstruction_c *i)
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{
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if (!get_SF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVP_GqEqR(bxInstruction_c *i)
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{
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if (get_PF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNP_GqEqR(bxInstruction_c *i)
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{
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if (!get_PF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVL_GqEqR(bxInstruction_c *i)
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{
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if (getB_SF() != getB_OF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNL_GqEqR(bxInstruction_c *i)
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{
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if (getB_SF() == getB_OF())
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVLE_GqEqR(bxInstruction_c *i)
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{
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if (get_ZF() || (getB_SF() != getB_OF()))
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNLE_GqEqR(bxInstruction_c *i)
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{
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if (! get_ZF() && (getB_SF() == getB_OF()))
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BX_WRITE_64BIT_REG(i->nnn(), BX_READ_64BIT_REG(i->rm()));
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}
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#endif /* if BX_SUPPORT_X86_64 */
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