util: disassembler register/address mapping fix

For def/use pruning, the linear address mapping of the x86
sub-registers (e.g., AX represents the lower 16 bits of EAX) must
overlap.  If it doesn't, e.g., AX and EAX are considered separate
registers by def/use pruning, resulting in a failure to correlate an
EAX def with a subsequent AX use.

The only user of this mapping up to now, RegisterImporter, forced all
register widths to 8 bits, thereby fortunately canceling out this
problem.  Nevertheless it makes no sense to continue encoding a
constant width in these virtual addresses.

Existing trace, fspgroup, fsppilot and result tables may be converted
to the new encoding by using this query:

UPDATE <tablename> SET data_address = ((data_address >> 4) & ~0xf) | data_address & 0xf;

Change-Id: I7a942b78c34f6140803a86af639eeedef3550f34
This commit is contained in:
Horst Schirmeier
2013-08-30 17:03:37 +02:00
parent 4115de91aa
commit 2108c8932f
2 changed files with 15 additions and 11 deletions

View File

@ -33,9 +33,8 @@ bool RegisterImporter::addRegisterTrace(simtime_t curtime, instruction_count_t i
const Trace_Event &ev,
const LLVMtoFailTranslator::reginfo_t &info,
char access_type) {
LLVMtoFailTranslator::reginfo_t one_byte_window = info;
one_byte_window.width = 8;
address_t from = one_byte_window.toDataAddress(), to = one_byte_window.toDataAddress() + (info.width) / 8;
address_t from = info.toDataAddress();
address_t to = from + info.width / 8;
// Iterate over all accessed bytes
for (address_t data_address = from; data_address < to; ++data_address) {