util: disassembler register/address mapping fix
For def/use pruning, the linear address mapping of the x86 sub-registers (e.g., AX represents the lower 16 bits of EAX) must overlap. If it doesn't, e.g., AX and EAX are considered separate registers by def/use pruning, resulting in a failure to correlate an EAX def with a subsequent AX use. The only user of this mapping up to now, RegisterImporter, forced all register widths to 8 bits, thereby fortunately canceling out this problem. Nevertheless it makes no sense to continue encoding a constant width in these virtual addresses. Existing trace, fspgroup, fsppilot and result tables may be converted to the new encoding by using this query: UPDATE <tablename> SET data_address = ((data_address >> 4) & ~0xf) | data_address & 0xf; Change-Id: I7a942b78c34f6140803a86af639eeedef3550f34
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@ -33,9 +33,8 @@ bool RegisterImporter::addRegisterTrace(simtime_t curtime, instruction_count_t i
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const Trace_Event &ev,
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const LLVMtoFailTranslator::reginfo_t &info,
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char access_type) {
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LLVMtoFailTranslator::reginfo_t one_byte_window = info;
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one_byte_window.width = 8;
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address_t from = one_byte_window.toDataAddress(), to = one_byte_window.toDataAddress() + (info.width) / 8;
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address_t from = info.toDataAddress();
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address_t to = from + info.width / 8;
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// Iterate over all accessed bytes
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for (address_t data_address = from; data_address < to; ++data_address) {
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