T32: Breakpoint test code

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2107 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
hoffmann
2013-02-16 23:05:07 +00:00
parent 6761268d93
commit 205c7ec919
4 changed files with 35 additions and 29 deletions

View File

@ -57,5 +57,26 @@ int main(int argc, char** argv){
// Let the SimulatorController do the dirty work.
fail::simulator.startup();
// Here, we come back after any experiment called a resume
// Start execution of the SUT.
// The experiments/traces hopefully set some Breakpoints, we can react on.
// We may also provide a timeout, if a TimerListener was set wanted.
/*
while(1) {
// Start execution (with next timeout, in any)
// Wait for debugger to stop.
// Evaluate state.
// Call appropriate callback of the SimulatorController.
}
*/
cout << "[T32 Backend] After startup" << endl;
return 0;
}

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@ -1,24 +0,0 @@
#ifndef __T32_CONNECTOR_HPP__
#define __T32_CONNECTOR_HPP__
#include <t32.h>
namespace fail {
/**
* \class T32Connector
*/
class T32Connector {
public:
/**
* Save simulator state. Quite hard on real hardware! Also safe all HW registers!
* @param path Location to store state information
* @return \c true if the state has been successfully saved, \c false otherwise
*/
};
} // end-of-namespace: fail
#endif // __T32_CONNECTOR_HPP__

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@ -17,16 +17,14 @@ aspect T32Listener
bool onAddition()
{
// Setup Breakpoint in T32
std::cout << "T32Listener::onAddition" << std::endl;
// Enable Breakpoint
T32_WriteBreakpoint( m_WatchInstrPtr, T32::MEMACCESS::PROGRAM, T32::BP::EXECUTION, 1);
return true;
return T32_WriteBreakpoint( m_WatchInstrPtr, T32::MEMACCESS::PROGRAM, T32::BP::EXECUTION, 1) == 0;
}
void onDeletion()
{
// Delete Breakpoint in T32
T32_WriteBreakpoint( m_WatchInstrPtr, T32::MEMACCESS::PROGRAM, T32::BP::CLEAR, 1);
// TODO Error handling
}
};
};

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@ -24,7 +24,7 @@ bool VEZSExperiment::run()
{
m_log << "STARTING EXPERIMENT" << endl;
m_log << "Instruction Pointer: 0x" << hex << simulator.getCPU(0).getInstructionPointer() << endl;
// Test register access
Register* reg = simulator.getCPU(0).getRegister(RI_R1);
m_log << "Register R2: 0x" << hex << simulator.getCPU(0).getRegisterContent(reg) << endl;
@ -33,6 +33,7 @@ bool VEZSExperiment::run()
simulator.getCPU(0).setRegisterContent(reg, 0x23);
// Test Memory access
address_t targetaddress = 0x12345678;
MemoryManager& mm = simulator.getMemoryManager();
mm.setByte(targetaddress, 0x42);
@ -44,6 +45,16 @@ bool VEZSExperiment::run()
// read back bytes
mm.getBytes(targetaddress, 4, tb);
// Test Breakpoints
address_t address = 0x11223344;
BPSingleListener bp(address);
simulator.addListener(&bp);
simulator.clearListeners();
// resume backend.
simulator.resume();
// Explicitly terminate, or the simulator will continue to run.
simulator.terminate();
}