diff --git a/src/core/sal/Event.hpp b/src/core/sal/Event.hpp
index 62d488ed..89f892b9 100644
--- a/src/core/sal/Event.hpp
+++ b/src/core/sal/Event.hpp
@@ -30,7 +30,7 @@ public:
  * \class BPEvent
  * A breakpoint, i.e. a specific instruction address, was reached.
  */
-class BPEvent : virtual public BaseEvent {
+class BPEvent : public BaseEvent {
 protected:
 	address_t m_TriggerInstrPtr; //!< the address which triggered the event
 public:
@@ -57,7 +57,7 @@ public:
  * A read/write memory access to a physical address with a specific width was
  * observed.
  */
-class MemAccessEvent : virtual public BaseEvent {
+class MemAccessEvent : public BaseEvent {
 public:
 	enum access_type_t {
 		MEM_UNKNOWN   = 0x0, //!< internal initialization flag, indicating an uninitialized state
@@ -142,7 +142,7 @@ public:
  * An interrupt or trap was observed.
  * FIXME: Naming.  Interrupts are not exactly "trouble".
  */
-class TroubleEvent : virtual public BaseEvent {
+class TroubleEvent : public BaseEvent {
 private:
 	/**
 	 * Specific guest system interrupt/trap number that actually
@@ -179,7 +179,7 @@ public:
  * \class InterruptEvent
  * An interrupt was observed.
  */
-class InterruptEvent : virtual public TroubleEvent {
+class InterruptEvent : public TroubleEvent {
 private:
 	bool m_IsNMI; //!< non maskable interrupt flag
 public:
@@ -210,7 +210,7 @@ public:
  * The guest system emitted explicit guest->experiment communication.
  */
 // FIXME: cf. GuestListener
-class GuestEvent : virtual public BaseEvent {
+class GuestEvent : public BaseEvent {
 private:
 	char m_Data; //!< guest event data
 	unsigned m_Port; //!< communication port
@@ -238,7 +238,7 @@ public:
  * \class IOPortEvent
  * Observes I/O access on architectures with a separate I/O access mechanism (e.g. IA-32)
  */
-class IOPortEvent : virtual public BaseEvent {
+class IOPortEvent : public BaseEvent {
 private:
 	unsigned char m_Data;
 public:
@@ -261,7 +261,7 @@ public:
  * \class JumpEvent
  * A conditional jump instruction is about to execute.
  */
-class JumpEvent : virtual public BaseEvent {
+class JumpEvent : public BaseEvent {
 private:
 	unsigned m_OpcodeTrigger;
 	bool m_FlagTriggered;
diff --git a/src/core/sal/Listener.hpp b/src/core/sal/Listener.hpp
index 8a478425..e54ee1c3 100644
--- a/src/core/sal/Listener.hpp
+++ b/src/core/sal/Listener.hpp
@@ -109,7 +109,7 @@ public:
  * \class BListener
  * A Breakpoint listener to observe instruction changes within a given address space.
  */
-class BPListener : virtual public BaseListener {
+class BPListener : public BaseListener {
 private:
 	BPEvent m_Data;
 	address_t m_CR3;
@@ -156,7 +156,7 @@ public:
  * \class BPSingleListener
  * A Breakpoint listener to observe specific instruction pointers.
  */
-class BPSingleListener : virtual public BPListener {
+class BPSingleListener : public BPListener {
 private:
 	address_t m_WatchInstrPtr;
 public:
@@ -198,7 +198,7 @@ public:
  * \class BPRangeListener
  * A listener type to observe ranges of instruction pointers.
  */
-class BPRangeListener : virtual public BPListener {
+class BPRangeListener : public BPListener {
 private:
 	address_t m_WatchStartAddr;
 	address_t m_WatchEndAddr;
@@ -238,7 +238,7 @@ public:
  * \class MemAccessListener
  * Observes memory read/write accesses.
  */
-class MemAccessListener : virtual public BaseListener {
+class MemAccessListener : public BaseListener {
 private:
 	//! Specific physical guest system address to watch, or ANY_ADDR.
 	address_t m_WatchAddr;
@@ -328,7 +328,7 @@ public:
  * \class MemReadListener
  * Observes memory read accesses.
  */
-class MemReadListener : virtual public MemAccessListener {
+class MemReadListener : public MemAccessListener {
 public:
 	MemReadListener()
 		: MemAccessListener(MemAccessEvent::MEM_READ) { }
@@ -340,7 +340,7 @@ public:
  * \class MemWriteListener
  * Observes memory write accesses.
  */
-class MemWriteListener : virtual public MemAccessListener {
+class MemWriteListener : public MemAccessListener {
 public:
 	MemWriteListener()
 		: MemAccessListener(MemAccessEvent::MEM_READ) { }
@@ -352,7 +352,7 @@ public:
  * \class TroubleListener
  * Observes interrupt/trap activties.
  */
-class TroubleListener : virtual public BaseListener {
+class TroubleListener : public BaseListener {
 private:
 	TroubleEvent m_Data; //!< event related data, e.g. trap number
 	/**
@@ -404,7 +404,7 @@ public:
  * \class InterruptListener
  * Observes interrupts of the guest system.
  */
-class InterruptListener : virtual public TroubleListener {
+class InterruptListener : public TroubleListener {
 private:
 	InterruptEvent m_Data; //!< event related data, e.g. NMI flag
 public:
@@ -424,7 +424,7 @@ public:
  * \class TrapListener
  * Observes traps of the guest system.
  */
-class TrapListener : virtual public TroubleListener {
+class TrapListener : public TroubleListener {
 public:
 	TrapListener() { }
 	TrapListener(unsigned trap) { addWatchNumber(trap); }
@@ -437,7 +437,7 @@ public:
 // FIXME: This is not a "clean design" ... IOPortListener looks much like a copy of this class.
 //        Additionaly, the port is fixed (at least in Bochs) but can be modified using setPort
 //        (effectless for now).
-class GuestListener : virtual public BaseListener {
+class GuestListener : public BaseListener {
 private:
 	GuestEvent m_Data;
 public:
@@ -464,7 +464,7 @@ public:
  * \class IOPortListener
  * Observes I/O access on architectures with a separate I/O access mechanism (e.g. IA-32)
  */
-class IOPortListener : virtual public BaseListener {
+class IOPortListener : public BaseListener {
 private:
 	IOPortEvent m_Data;
 	unsigned m_Port;
@@ -518,7 +518,7 @@ public:
  * \class JumpListener
  * JumpListeners are used to observe conditional jumps (if...else if...else).
  */
-class JumpListener : virtual public BaseListener {
+class JumpListener : public BaseListener {
 private:
 	JumpEvent m_Data;
 public: