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util: handle missing register mapping gracefully

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It's OK if we cannot map every register LLVM knows to a Fail register
ID, but we need to explicitly skip these cases in the
RegisterImporter.

Change-Id: I2152f819fb94aa4de5720c5798b229b66988d382
This commit is contained in:
Horst Schirmeier
2013-09-02 12:09:00 +02:00
parent 89aff7df65
commit 11513ef78d
3 changed files with 21 additions and 2 deletions
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2
src/core/util/llvmdisassembler/LLVMtoFailTranslator.cpp
View File

@ -9,7 +9,7 @@ const LLVMtoFailTranslator::reginfo_t & LLVMtoFailTranslator::getFailRegisterID
if( it != llvm_to_fail_map.end() ) {// found if( it != llvm_to_fail_map.end() ) {// found
return (*it).second; return (*it).second;
} else { // not found } else { // not found
std::cout << "Fail ID for LLVM Register id " << regid << " not found :(" << std::endl; std::cout << "Fail ID for LLVM Register id " << std::dec << regid << " not found :(" << std::endl;
//exit(EXIT_FAILURE); //exit(EXIT_FAILURE);
return notfound; return notfound;
} }

8
src/core/util/llvmdisassembler/LLVMtoFailTranslator.hpp
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@ -51,6 +51,12 @@ protected:
public: public:
/**
* Translates a backend-specific register ID to a Fail register ID.
* @param regid A backend-specific register ID.
* @return A Fail* register ID, or LLVMtoFailTranslator::notfound if no
* mapping was found.
*/
const reginfo_t & getFailRegisterID(unsigned int regid); const reginfo_t & getFailRegisterID(unsigned int regid);
regdata_t getRegisterContent(ConcreteCPU & cpu, const reginfo_t & reg); regdata_t getRegisterContent(ConcreteCPU & cpu, const reginfo_t & reg);
@ -63,7 +69,7 @@ public:
} }
int getFailRegisterId(unsigned int regid) { return this->getFailRegisterID(regid).id; }; int getFailRegisterId(unsigned int regid) { return this->getFailRegisterID(regid).id; };
private:
reginfo_t notfound; reginfo_t notfound;
}; };

13
tools/import-trace/RegisterImporter.cc
View File

@ -130,6 +130,12 @@ bool RegisterImporter::handle_ip_event(fail::simtime_t curtime, instruction_coun
for (std::vector<LLVMDisassembler::register_t>::const_iterator it = opcode.reg_uses.begin(); for (std::vector<LLVMDisassembler::register_t>::const_iterator it = opcode.reg_uses.begin();
it != opcode.reg_uses.end(); ++it) { it != opcode.reg_uses.end(); ++it) {
const LLVMtoFailTranslator::reginfo_t &info = ltof.getFailRegisterID(*it); const LLVMtoFailTranslator::reginfo_t &info = ltof.getFailRegisterID(*it);
if (&info == &ltof.notfound) {
LOG << "Could not find a mapping for LLVM input register #" << std::dec << *it
<< " at IP " << std::hex << ev.ip()
<< ", skipping" << std::endl;
continue;
}
/* if not tracing flags, but flags register -> ignore it /* if not tracing flags, but flags register -> ignore it
if not tracing gp, but ! flags -> ignore it*/ if not tracing gp, but ! flags -> ignore it*/
@ -146,6 +152,13 @@ bool RegisterImporter::handle_ip_event(fail::simtime_t curtime, instruction_coun
for (std::vector<LLVMDisassembler::register_t>::const_iterator it = opcode.reg_defs.begin(); for (std::vector<LLVMDisassembler::register_t>::const_iterator it = opcode.reg_defs.begin();
it != opcode.reg_defs.end(); ++it) { it != opcode.reg_defs.end(); ++it) {
const LLVMtoFailTranslator::reginfo_t &info = ltof.getFailRegisterID(*it); const LLVMtoFailTranslator::reginfo_t &info = ltof.getFailRegisterID(*it);
if (&info == &ltof.notfound) {
LOG << "Could not find a mapping for LLVM output register #" << std::dec << *it
<< " at IP " << std::hex << ev.ip()
<< ", skipping" << std::endl;
continue;
}
/* if not tracing flags, but flags register -> ignore it /* if not tracing flags, but flags register -> ignore it
if not tracing gp, but ! flags -> ignore it*/ if not tracing gp, but ! flags -> ignore it*/
if (info.id == RID_FLAGS && !do_flags) if (info.id == RID_FLAGS && !do_flags)