towards multi-arch

arch/riscv/bootcode/boot.h

@@ -0,0 +1,30 @@
+#pragma once
+
+#if defined(__riscv) && !defined(__CHERI__)
+#define RISCV 1
+#define ARCH_ASM_CLOBBER_ALL NO_CAP_REGS
+
+#elif defined(__riscv) && defined(__CHERI__)
+#define RISCVCHERI 1
+#define ARCH_ASM_CLOBBER_ALL NO_CAPS_REGS, CAP_REGS
+
+#else
+#warning compiling for unknown architecture, using stdlib malloc.
+#endif
+
+#define NO_CAP_REGS "ra","sp","gp","tp","t0","t1","t2","t3","t4","t5","t6","s0","s1","s2","s3","s4","s5","s6","s7","s8","s9","s10","s11","a0","a1","a2","a3","a4","a5","a6","a7"
+
+#define CAP_REGS "cra","csp","cgp","ctp","ct0","ct1","ct2","ct3","ct4","ct5","ct6","cs0","cs1","cs2","cs3","cs4","cs5","cs6","cs7","cs8","cs9","cs10","cs11","ca0","ca1","ca2","ca3","ca4","ca5","ca6","ca7"
+
+#ifndef __ASSEMBLER__
+
+#if __riscv_xlen == 32
+typedef unsigned int size_t;
+#elif __riscv_xlen == 64
+typedef unsigned long size_t;
+#elif DEBUG
+#else
+#warning Unknown __riscv_xlen value
+typedef unsigned long size_t;
+#endif
+#endif

arch/riscv/bootcode/cheri32.c

@@ -0,0 +1,30 @@
+#include <cheri_init_globals.h>
+#include "boot.h"
+
+asm (
+".text" "\n"
+".option push" "\n"
+".option nocapmode" "\n"
+".global _start" "\n"
+"_start:" "\n"
+"       lla     sp, __sp" "\n"
+"       lla      t0, __stack_size" "\n"
+"       cfromptr        csp, ddc, sp" "\n"
+"       csetbounds      csp, csp, t0" "\n"
+"       cincoffset      csp, csp, t0" "\n"
+"       lla     t0, _start_purecap" "\n"
+"       cfromptr        ct0, ddc, t0" "\n"
+"       li      t1, 1" "\n"
+"       csetflags       ct0, ct0, t1" "\n"
+"       cjr     ct0" "\n"
+".option pop" "\n"
+);
+
+extern void os_main();
+
+void _start_purecap(void) {
+        cheri_init_globals_3(__builtin_cheri_global_data_get(),
+                __builtin_cheri_program_counter_get(),
+                __builtin_cheri_global_data_get());
+        os_main();
+}

arch/riscv/bootcode/cheri64.c

@@ -0,0 +1 @@
+cheri32.c

arch/riscv/bootcode/riscv32.c

@@ -0,0 +1,12 @@
+#include "boot.h"
+
+asm (
+".text" "\n"
+".global _start" "\n"
+"_start:" "\n"
+"       la     sp, __sp" "\n"
+"       la     t0, __stack_size" "\n"
+"       add    sp, sp, t0" "\n"
+"       la     t0,  os_main" "\n"
+"       jr     t0" "\n"
+       );

arch/riscv/bootcode/riscv64.c

@@ -0,0 +1 @@
+riscv32.c